digital lock

基本解释数字锁

网络释义

1)digital lock,数字锁2)digital PLL,数字锁相3)digital lock in,数字锁相4)DPLL,数字锁相5)digital phase locked loop,数字锁相6)digital lock-in,数字锁相

用法和例句

A digital PLL is implemented based on TMS320C2407A DSP circuit.

为了实现光伏逆变系统与电网的可靠并联运行,采用了一种基于DSP芯片TMS320C2407A实现数字锁相的方法,并通过实验作了验证,实验结果表明,锁相精度高,稳定可靠。

In this paper,the theory of using digital lock in technique to measure micro ohm resistance and its experiment device are discussed.

讨论了用数字锁相技术进行μΩ电阻测量的原理及其装置,并给出了模拟测量μΩ电阻的测试结果。

A new method of digital phase locked loop based on digital signal processing(DSP) and complex programmble logic device(CPLD) was proposed.

提出了一种基于数字信号处理技术(DSP)和可编程逻辑控制器件(CPLD)的全数字锁相方法。

In order to realize the frequency and phase of output voltage synchronized with input voltage when UPS works, in the paper, a digital phase locked loop based on MCU with high precision is presented.

为了实现不问断电源(UPS)运行时输入输出电压频率和相位保持一致,本文结合锁相环的原理,利用单片机实现高精度的数字锁相环。

The digital lock-in technique is used to rather extract the effective signal from the noise and reduce the measurement error.

采用数字锁相技术从噪声中提取有效信号,以减小测量误差。

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