The verification includes RTL simulation, gate level simulation and static timing analysis.
验证工作包括RTL级仿真 、 门级仿真和静态时序分析.
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The design includes system level design, RTL level design and logic synthesis.
设计工作包括系统级设计 、 RTL级设计、逻辑综合.
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Module level micro architecture design and RTL implementation. Chip level integration.
模块级微架构设计以及RTL实现, 片级整合.
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Creating an effective RTL behavioral model.
建立了一种有效的RTL行为模型.
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RTL 8019 AS source code with ATMEGA 8515 ( schema ) complete source code, has been tested.
RTL8019AS源代码ATMEGA8515 ( 架构 ) 完整的源代码, 已经过测试.
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The driver of RTL 8019 AS LLC layer.
而RTL8019AS的驱动程序设计属于逻辑链路子层实现的范畴.
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With the introduction of ethernet controller RTL 8910 AS , the initializing, data sending and data receiving programs were deployed.
介绍了以太网控制芯片RTL8019AS.讨论了如何在该模块中实现网卡初始化及网卡收发数据的网络通讯过程.
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The hardware platform mainly include AT 89 C 55 with 20 k bytes Flash, RTL 8019 AS and RTL 8029 AS, CPLD EPM 7128 S etc.
硬件平台主要是由内带20k字节Flash的AT89C55,32k字节 容量的RAM62256, 网络接口芯片RTL8019AS和RTL8029AS,做PCI-ISA桥的CPLDEPM7128S等组成.
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