Implementation of parallel CRC based on FPGA
基于FPGA的循环冗余校验并行实现
This paper introduces the algorithm,theory and checking regulations of CRC,analyzes the computational process of CRC,takes CRC-16 as an example and gives some of the source program of hardware description language Verilog HDL to achieve CRC-16.
介绍了循环冗余校验CRC算法原理和校验规则,分析了CRC校验码的具体计算过程,并以CRC-16为例,给出了使用硬件描述语言Verilog HDL来实现CRC-16的部分源程序,它既是校验码的生成器,也是待校验数据的校验器,对该例进行仿真并给出综合结果,最终可以在现场可编程门阵列(FPGA)上实现,其工作频率可达400 MHz。
For the CRC(Cyclic Redundancy Check) code in frame format,an 8-bit parallel CRC logical circuit is designed through detailed calculation and derivation and implemented in FPGA(Field Programmable Gate Array),which is simulated under MAX + PlusⅡ.
针对帧格式中的循环冗余校验(CRC)校验码,通过详细的计算推导,设计出8位并行CRC逻辑电路并应用于现场可编程门阵列(FPGA),在MAX+PlusⅡ环境下进行了仿真,与串行CRC相比,并行CRC的编码速度大为提高。
The Design of CRC Based on CPLD
基于CPLD的循环冗余校验码的实现
cyclic redundancy check (CRC)
循环冗余校通验[检验]
Application of CRC in VSR system;
循环冗余校验在VSR系统中的应用
Implementation of parallel CRC based on FPGA
基于FPGA的循环冗余校验并行实现
Application of CRC Implementation with Software in the Wireless Detection System
循环冗余校验软件在无线检测系统中的应用
Implementation of CRC Calculation Based on Bytes Using FPGA
基于字节的循环冗余校验算法及FPGA实现
Cyclic Redundancy Check, detects files that are corrupt or possibly infected by a virus. -
循环冗余校验，侦测档案是舞弊或可能感染了病毒。
Data error (cyclic redundancy check).
数据错误(循环冗余检查)。
A cyclic code with minimum redundancy used to check errors in a set of characters.
一种用于检查一组字符的错误、并且具有最小冗余度的循环码。
FPGA Decoder Implementation for Quasi-Cyclic Low-Density Parity-Check Codes;
准循环低密度校验码译码器的FPGA实现
Design and Implementation of Decoder for Quasi-Cyclic Low-Density Parity-Check Codes;
准循环低密度校验码译码器的设计与实现
VLSI decoding design of low-density parity-check codes based on circulant matrices
基于循环矩阵的低密度校验码的VLSI译码设计
Cyclic Codes and Quadratic Residue Codes over Ring F_2+uF_2;
环F_2+uF_2上的循环码和二次剩余码
code redundancy of source conding
信源编码的代码冗余度
When the server reconstructs its copy of the working file, the CRC will be compared to ensure that nothing was corrupted during transit.
当服务器重建工作文件的拷贝的时候，循环冗余检验将对比确认没有任何事情破坏传输。
Construction of Low-density Parity-check(LDPC) Codes Based on Prefect Cyclic Difference Sets
基于完备循环差集低密度奇偶校验码的构造
A Layer2 frame cannot be processed by a receiver until all bits have been received by the receiver and a cyclic redundancy check( CRC) has been performed.
二层的帧必须等到所有比特全部接收通过CRC（环冗余校验）验后才能被处理。
A Partly-parallel Coder Structure of Quasi-cyclic Low-density Parity-check Codes
一种准循环低密度校验码部分并行编码结构设计