Nowadays, p/p~+ epitaxial silicon wafers are widely applied in CMOS and power devices.
p/p~+硅外延片是一类重要的硅材料,目前,p/p~+硅外延片主要在以CMOS工艺为代表的超大规模集成电路和大功率器件中应用。
Sub-micron silicon epilayer deposited by a novel Ultrahigh Vacuum Chemical Deposition System and fabrication of high frequency device;
UHV/CVD生长亚微米薄硅外延层及其高频器件研制
By spreading resistance profile technology,Si epitaxy thickness value was obtained through measuring the changing of depth resistivity.
实际外延片测试过程中,经常发生扩展电阻测试仪测量硅外延片厚度误差较大的问题,从三个方面分析了产生的原因,其中两方面存在于样品制备过程:样品研磨角度不等于垫块角度造成的误差;研磨斜面两条边缘不平行造成的误差。