Design of multifunctional digital clock in instrument based on FPGA device;
基于FPGA的仪表用多功能数字时钟的嵌入设计
Design of digital clock based on VHDL;
基于VHDL的数字时钟的设计
A design of digital clock based on FPGA
基于FPGA的数字时钟的设计
Design of the instantaneous frequency measuring module based on digital phase shift theory;
基于多路数字移相时钟的瞬时测频模块设计
The Design Process and Emulation based on AT89C51 Digital Time Unit
基于AT89C51数字时钟设计过程与仿真
Study on Digital Clock Based on AT89C51 Single-chip Microcomputer
基于AT89C51单片机数字时钟的研究
The Design of a Multifunctional Digital Clock Based on MCU
基于单片机的多功能数字时钟系统设计分析
a digital watch [clock]
数字式手表 [时钟]
These clocks are called digital clocks, and they tell the time with a set of numerals which appear in a little window.
这种钟叫做数字钟，它用一组出现在小显示屏上的数字报时。
The Research on Transmission of Clock Signals in Digital Synchronization Network;
数字同步网时钟信号传递问题的研究
Design of Digital Phase Locked Loop Used in SDH Equipment Clock
SDH设备时钟中的数字锁相环设计
Design of the Functions of Digital Temperature and Real-time Clock in Intelligent Instrument
智能仪器仪表中数字温度实时时钟功能的设计
an unadjusted figure of 8.5 percent; the unadjusted clock is running fast;.
8.5%未调整的数字；这个没有调过的时钟快了些。
Requirements for clock and synchronization equipment used in the digital network
GB12048-1989数字网内时钟和同步设备的进网要求
System clock recover is the key in digital TV system.
系统时钟恢复是数字电视系统设计中的难点。
Design of a Circuit Synchronizing the Byte Clock with the Parallel Data in the Deserializer
接收器中并行数据与字节时钟同步的电路设计
Of course the sampling clock is itself a digital signal.
时钟本身也是数字信号，也会干扰模拟电路。
A 10ps skew pure digital clock divider
一种10ps以下时钟偏差的纯数字电路分频器设计
Analysis of Clock Strategy and Protocol Conformance for Digital Circuits in EPC Gen2 RFID Tag
EPC Gen2标签数字电路时钟策略和协议一致性分析
The design of clock AD9516-3 and the application in IF digital systems
AD9516-3时钟设计及在中频数字系统中的应用
Research on the Clock Distribution Network and the Deskew Techniques in Synchronous Digital Systems
同步数字系统时钟分布及偏斜补偿技术研究
Design of High Accuracy Synchronous Sampling Clock in Digital Substations
数字化变电站中高精度同步采样时钟的设计